On data retrieval, the earphone jack of the recorder connects to the CASSETTE DATA IN jack of the Apple. There may or may not be a polarity inversion in going through the recorder; it does not matter. The cassette input is ac coupled by ClO and attenuated to 50% by R17 and R30. The signal then connects to the inverting input of operational amplifier K13.
Operational amplifier K13 is wired to act as a comparator. Ground through R16 provides an average comparator threshold of 0 volt and R15 provides about 100 mV of hysteresis at the input of the comparator. This circuit arrangement is called a zero crossing detector. The minimum cassette input that produces good results is about 1 volt peak-peak. While reading tapes, the output of K13 swings from plus-saturated to minus-saturated, or about ± 4 volts.
Resistor R29 limits current out of the input of H14 when K13-6 is low. Resistor R29 and the input clamping diode of H14 effectively convert the signal to a TTL level at H14-4. Note that the signal is inverted by 1(13. Except for an inversion, the TTL signal at J13-8 has been recreated at H14-4. To see this, compare the waveforms for J13-8 and H14-4 as shown in Fig. 7-8.
At this point we must discuss how the cassette signal gets through data selector H14 (Fig. C12*). If the address is in the range $C060-$CO6F, then F13-9 will go low during 42. This enables 1114 via pin 7. Data selector H14 selects one of its eight inputs as a function of address lines ADO, AD1, and AD2. When the address is $C060 or $C068 (ADO, AD1, and AD2 all equal 0), 1114 is enabled and selects input pin 4 to output on pin 5. Pin H14-5 connects to data bus bit 7. Thus, at either of these addresses, the cassette input is put on data bus bit 7. Bit 7 is used since it is easily tested by various 6502 instructions. Since AD3 is not decoded by this part of the circuit, there are two addresses eight locations apart that can access the cassette input. In such cases, we usually use the lower address ($C060).
Routines in the monitor scan bit 7 at location $CO6O every 12.8 microseconds looking for a transition. By measuring the time between transitions, the routines can distinguish between header, sync, 0, and 1 bits.